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<feed xmlns="http://www.w3.org/2005/Atom"><title>Marcin Juszkiewicz - linaro</title><link href="https://marcin.juszkiewicz.com.pl/" rel="alternate"/><link href="https://marcin.juszkiewicz.com.pl/tag/linaro/feed/" rel="self"/><id>https://marcin.juszkiewicz.com.pl/</id><updated>2025-01-05T20:03:00+01:00</updated><entry><title>Future of BSA/PC-BSA/SBSA checklist page</title><link href="https://marcin.juszkiewicz.com.pl/2025/01/05/future-of-bsapc-bsasbsa-checklist-page/" rel="alternate"/><published>2025-01-05T20:03:00+01:00</published><updated>2025-01-05T20:03:00+01:00</updated><author><name>Marcin Juszkiewicz</name></author><id>tag:marcin.juszkiewicz.com.pl,2025-01-05:/2025/01/05/future-of-bsapc-bsasbsa-checklist-page/</id><summary type="html">Time to end this&amp;nbsp;project.</summary><content type="html">&lt;p&gt;During last years Arm released some specifications in an effort to help organise
standardise their market. We got Server Base System Architecture (&lt;span class="caps"&gt;SBSA&lt;/span&gt;), then
Base System Architecture (&lt;span class="caps"&gt;BSA&lt;/span&gt;) and finally &lt;span class="caps"&gt;PC&lt;/span&gt; Base System Architecture (&lt;span class="caps"&gt;PC&lt;/span&gt;-&lt;span class="caps"&gt;BSA&lt;/span&gt;)
one. Both &lt;span class="caps"&gt;SBSA&lt;/span&gt; and &lt;span class="caps"&gt;PC&lt;/span&gt;-&lt;span class="caps"&gt;BSA&lt;/span&gt; extend &lt;span class="caps"&gt;BSA&lt;/span&gt; (&lt;span class="caps"&gt;SBSA&lt;/span&gt; 7.0 was rebased on top of &lt;span class="caps"&gt;BSA&lt;/span&gt;).&lt;/p&gt;
&lt;p&gt;Did these documents changed the market? That&amp;#8217;s a discussion for another&amp;nbsp;time.&lt;/p&gt;
&lt;!--MORE--&gt;

&lt;h3&gt;The&amp;nbsp;checklist&lt;/h3&gt;
&lt;p&gt;Each of mentioned specifications comes with a compliance checklist referencing document
sections such as B_PE_11 which&amp;nbsp;states:&lt;/p&gt;
&lt;blockquote&gt;
&lt;p&gt;Each &lt;span class="caps"&gt;PE&lt;/span&gt; must implement a minimum of six breakpoints, two of which must be able
to match virtual address, contextID or &lt;span class="caps"&gt;VMID&lt;/span&gt;.&lt;/p&gt;
&lt;/blockquote&gt;
&lt;p&gt;To visualize these checklists I created the
&lt;a href="https://gpages.juszkiewicz.com.pl/sbsa-ref-status/bsa-sbsa.html"&gt;Arm &lt;span class="caps"&gt;BSA&lt;/span&gt;/&lt;span class="caps"&gt;PC&lt;/span&gt;-&lt;span class="caps"&gt;BSA&lt;/span&gt;/&lt;span class="caps"&gt;SBSA&lt;/span&gt; checklist&lt;/a&gt;
page where this data is presented as a table. How it is generated will be
explained&amp;nbsp;below.&lt;/p&gt;
&lt;h3&gt;Running &lt;span class="caps"&gt;ACS&lt;/span&gt;&lt;/h3&gt;
&lt;p&gt;Following the checklist manually is a difficult task so Arm released
Architecture Compliance Suites (&lt;span class="caps"&gt;ACS&lt;/span&gt; in short) for &lt;span class="caps"&gt;BSA&lt;/span&gt; and &lt;span class="caps"&gt;SBSA&lt;/span&gt; specifications
which run tests and tell whether your hardware is compliant. &lt;span class="caps"&gt;PC&lt;/span&gt;-&lt;span class="caps"&gt;BSA&lt;/span&gt; so far does
not have own &lt;span class="caps"&gt;ACS&lt;/span&gt;&amp;nbsp;yet.&lt;/p&gt;
&lt;p&gt;&lt;span class="caps"&gt;NOTE&lt;/span&gt;: I ran compliance suites only on &lt;span class="caps"&gt;UEFI&lt;/span&gt;+&lt;span class="caps"&gt;ACPI&lt;/span&gt; systems so do not know how &lt;span class="caps"&gt;BSA&lt;/span&gt;
&lt;span class="caps"&gt;ACS&lt;/span&gt; behaves on DeviceTree based&amp;nbsp;ones.&lt;/p&gt;
&lt;p&gt;At the start, &lt;span class="caps"&gt;ACPI&lt;/span&gt; tables are parsed and hardware details are checked, such as
&lt;span class="caps"&gt;GIC&lt;/span&gt;, &lt;span class="caps"&gt;SMMU&lt;/span&gt;, PCIe etc. You then get a summary of the&amp;nbsp;information:&lt;/p&gt;
&lt;pre&gt;&lt;code&gt; Creating Platform Information Tables
 PE_INFO: Number of PE detected       :    4
 GIC INFO: GIC version                :    v3
 GIC_INFO: Number of GICD             :    1
 GIC_INFO: Number of GICR RD          :    1
 GIC_INFO: Number of ITS              :    1
 TIMER_INFO: System Counter frequency :    1000 MHz
 TIMER_INFO: Number of system timers  :    0
 WATCHDOG_INFO: Number of Watchdogs   :    1
 PCIE_INFO: Number of ECAM regions    :    1
 PCIE_INFO: Number of BDFs found      :    4
 PCIE_INFO: Number of RCiEP           :    2
 PCIE_INFO: Number of RCEC            :    0
 PCIE_INFO: Number of EP              :    1
 PCIE_INFO: Number of RP              :    1
 PCIE_INFO: Number of iEP_EP          :    0
 PCIE_INFO: Number of iEP_RP          :    0
 PCIE_INFO: Number of UP of switch    :    0
 PCIE_INFO: Number of DP of switch    :    0
 PCIE_INFO: Number of PCI/PCIe Bridge :    0
 PCIE_INFO: Number of PCIe/PCI Bridge :    0
 SMMU_INFO: Number of SMMU CTRL       :    1
 SMMU_INFO: SMMU index 00 version     :    v3.1
 Peripheral: Num of USB controllers   :    1
 Peripheral: Num of SATA controllers  :    1
 Peripheral: Num of UART controllers  :    1
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;The format may differ a bit between both &lt;span class="caps"&gt;BSA&lt;/span&gt; &lt;span class="caps"&gt;ACS&lt;/span&gt; and &lt;span class="caps"&gt;SBSA&lt;/span&gt; &lt;span class="caps"&gt;ACS&lt;/span&gt; but data is&amp;nbsp;there.&lt;/p&gt;
&lt;p&gt;Then tests run in groups (&lt;span class="caps"&gt;PE&lt;/span&gt;, Memory map, &lt;span class="caps"&gt;GIC&lt;/span&gt;, &lt;span class="caps"&gt;SMMU&lt;/span&gt;, PCIe etc.). Each test can
return one of 3 values: &lt;span class="caps"&gt;PASS&lt;/span&gt;, &lt;span class="caps"&gt;FAIL&lt;/span&gt; or &lt;span class="caps"&gt;SKIPPED&lt;/span&gt; (usually when the requirements to
run the test are not&amp;nbsp;met):&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;  28 : Check Fine Grain Trap Support         
       Failed on PE -    0
       S_L7PE_01
       Checkpoint --  1                           : Result:  FAIL
  29 : Check for ECV support                 
       Failed on PE -    0
       S_L7PE_02
       Checkpoint --  1                           : Result:  FAIL
  30 : Check for AMU Support                 
       Failed on PE -    0
       S_L7PE_03
       Checkpoint --  1                           : Result:  FAIL
  31 : Checks ASIMD Int8 matrix multiplc          : Result:  PASS
  32 : Check for BFLOAT16 extension               : Result:  PASS
  33 : Check PAuth2, FPAC &amp;amp; FPACCOMBINE           : Result:  PASS
  34 : Check for SVE Int8 matrix multiplc         : Result:  PASS
  35 : Check for data gathering hint              : Result:  PASS
  36 : Check WFE Fine tune delay feature     
       Recommened WFE fine-tuning delay feature not implemented
       S_L7PE_09
       Checkpoint --  2                           : Result:  SKIPPED
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;As you can see when test does not pass you get a tag (like S_L7PE_01) pointing
to relevant&amp;nbsp;specification.&lt;/p&gt;
&lt;h4&gt;Verbose&amp;nbsp;mode&lt;/h4&gt;
&lt;p&gt;Each &lt;span class="caps"&gt;ACS&lt;/span&gt; can be run in verbose mode by adding &amp;#8220;-v 1&amp;#8221; to the command line. Amount
of detail is increased to the level that logging output is highly recommended.
You can compare my older&amp;nbsp;logs:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;a href="https://github.com/hrw/sbsa-ref-status/blob/main/logs/bsa-neoverse-n2.log"&gt;&lt;span class="caps"&gt;BSA&lt;/span&gt;&amp;nbsp;normal&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://github.com/hrw/sbsa-ref-status/blob/main/logs/bsa-neoverse-n2-v1.log"&gt;&lt;span class="caps"&gt;BSA&lt;/span&gt;&amp;nbsp;verbose&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://github.com/hrw/sbsa-ref-status/blob/main/logs/sbsa-neoverse-n2-7.log"&gt;&lt;span class="caps"&gt;SBSA&lt;/span&gt; level 7&amp;nbsp;normal&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://github.com/hrw/sbsa-ref-status/blob/main/logs/sbsa-neoverse-n2-7-v1.log"&gt;&lt;span class="caps"&gt;SBSA&lt;/span&gt; level 7&amp;nbsp;verbose&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;h3&gt;Back to table&amp;nbsp;stuff&lt;/h3&gt;
&lt;p&gt;In my &lt;a href="https://github.com/hrw/sbsa-ref-status/"&gt;sbsa-ref-status&lt;/a&gt; repository I
have scripts that gather and parse data for &lt;span class="caps"&gt;QEMU&lt;/span&gt;&amp;#8217;s &lt;span class="caps"&gt;SBSA&lt;/span&gt; Reference Platform
(sbsa-ref in short). The result is set of &lt;span class="caps"&gt;YAML&lt;/span&gt; files 
(&lt;a href="https://github.com/hrw/sbsa-ref-status/blob/main/status-bsa.yml"&gt;status-bsa.yml&lt;/a&gt; and
&lt;a href="https://github.com/hrw/sbsa-ref-status/blob/main/status-sbsa.yml"&gt;status-sbsa.yml&lt;/a&gt;)
that contain information how the tests&amp;nbsp;went:&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;31:
  level: '7'
  status:
    cortex-a57: FAIL
    cortex-a72: FAIL
    max: PASS
    neoverse-n1: FAIL
    neoverse-n2: PASS
    neoverse-v1: PASS
  tags: S_L7PE_04
  title: Checks ASIMD Int8 matrix multiplc
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;As you see test for S_L7PE_04 passed on some cpu core models and failed on old
ones. This pattern continues for other tests and tags. Several entries have only
&lt;span class="caps"&gt;SKIPPED&lt;/span&gt; values because the hardware lacked something required to run&amp;nbsp;them.&lt;/p&gt;
&lt;p&gt;Those scripts should work with results from other&amp;nbsp;hardware.&lt;/p&gt;
&lt;h3&gt;Test&amp;nbsp;coverage&lt;/h3&gt;
&lt;p&gt;Some tags do not have coverage in the &lt;span class="caps"&gt;ACS&lt;/span&gt;. Some tests check for things that are
not present in checklists present in the specifications. In these cases it is
important to look into &lt;span class="caps"&gt;ACS&lt;/span&gt;&amp;nbsp;documentation:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;a href="https://github.com/ARM-software/bsa-acs/blob/main/docs/arm_bsa_testcase_checklist.rst"&gt;&lt;span class="caps"&gt;BSA&lt;/span&gt; &lt;span class="caps"&gt;ACS&lt;/span&gt; testcase&amp;nbsp;checklist&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://github.com/ARM-software/sbsa-acs/blob/master/docs/arm_sbsa_testcase_checklist.rst"&gt;&lt;span class="caps"&gt;SBSA&lt;/span&gt; &lt;span class="caps"&gt;ACS&lt;/span&gt; testcase&amp;nbsp;checklist&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Both of these expand on the checklists from the specifications with additional
information. Which &lt;span class="caps"&gt;SBSA&lt;/span&gt; level test was written for, is it tested in the &lt;span class="caps"&gt;UEFI&lt;/span&gt; or
Linux environment, is additional exerciser card required&amp;nbsp;etc.&lt;/p&gt;
&lt;p&gt;I used both to expand status-(s)bsa.yml files to ensure all tested entries are&amp;nbsp;listed.&lt;/p&gt;
&lt;h3&gt;Generation of checklist&amp;nbsp;page&lt;/h3&gt;
&lt;p&gt;To generate a page with checklist table I use another &lt;span class="caps"&gt;YAML&lt;/span&gt; file:
&lt;a href="https://github.com/hrw/sbsa-ref-status/blob/main/xbsa-checklist.yml"&gt;xbsa-checklist.yml&lt;/a&gt;.
This file maps tags from the specifications into groups and subgroups and keeps
information on whether tag required for &lt;span class="caps"&gt;BSA&lt;/span&gt; v1/v2, &lt;span class="caps"&gt;PC&lt;/span&gt;-&lt;span class="caps"&gt;BSA&lt;/span&gt; or &lt;span class="caps"&gt;SBSA&lt;/span&gt; levels. I
wrote it by hand and it needs to be updated with every specification&amp;nbsp;update.&lt;/p&gt;
&lt;p&gt;Next &lt;a href="https://github.com/hrw/sbsa-ref-status/blob/main/generate-xbsa.py"&gt;generate-xbsa.py&lt;/a&gt;
needs to be run which generates &lt;span class="caps"&gt;HTML&lt;/span&gt; page with the&amp;nbsp;table.&lt;/p&gt;
&lt;h3&gt;Caveats&lt;/h3&gt;
&lt;p&gt;Changes to &lt;span class="caps"&gt;ACS&lt;/span&gt; may alter the test numbers or tags used. I reported several
issues against both &lt;span class="caps"&gt;BSA&lt;/span&gt; &lt;span class="caps"&gt;ACS&lt;/span&gt; and &lt;span class="caps"&gt;SBSA&lt;/span&gt; &lt;span class="caps"&gt;ACS&lt;/span&gt; about it and they were handled. At this
moment all tests have tags&amp;nbsp;assigned.&lt;/p&gt;
&lt;p&gt;If the generated page lists &amp;#8220;&lt;span class="caps"&gt;ACS&lt;/span&gt; only tests&amp;#8221; entries it means one of
status-*.yml file needs to be updated because some unhandled tag was used. Or
&lt;span class="caps"&gt;ACS&lt;/span&gt; change had error in tag&amp;nbsp;name.&lt;/p&gt;
&lt;p&gt;Tests may be renamed &amp;#8212; in such cases status files will get new ones. When test
numbers change (which is rare) then manual checking may be&amp;nbsp;required.&lt;/p&gt;
&lt;h3&gt;&lt;span class="caps"&gt;PC&lt;/span&gt;-&lt;span class="caps"&gt;BSA&lt;/span&gt; &lt;span class="caps"&gt;ACS&lt;/span&gt;?&lt;/h3&gt;
&lt;p&gt;According to Arm developers (&lt;a href="https://github.com/ARM-software/bsa-acs/issues/395"&gt;&lt;span class="caps"&gt;BSA&lt;/span&gt; &lt;span class="caps"&gt;ACS&lt;/span&gt; issue #395&lt;/a&gt;)
there will be &lt;span class="caps"&gt;PC&lt;/span&gt;-&lt;span class="caps"&gt;BSA&lt;/span&gt; &lt;span class="caps"&gt;ACS&lt;/span&gt; in first week of December. Once it is released, a new parser
will need to be written (like &lt;a href="https://github.com/hrw/sbsa-ref-status/blob/main/parse-bsa-log.py"&gt;one for &lt;span class="caps"&gt;BSA&lt;/span&gt; &lt;span class="caps"&gt;ACS&lt;/span&gt;&lt;/a&gt;
or &lt;a href="https://github.com/hrw/sbsa-ref-status/blob/main/parse-sbsa-log.py"&gt;for &lt;span class="caps"&gt;SBSA&lt;/span&gt; &lt;span class="caps"&gt;ACS&lt;/span&gt;&lt;/a&gt;) and
the page generator updated to use this&amp;nbsp;information.&lt;/p&gt;
&lt;h3&gt;Future?&lt;/h3&gt;
&lt;p&gt;This page is one of projects I plan to abandon in 2025. It was a useful tool for
checking what needed to be done for the &lt;span class="caps"&gt;SBSA&lt;/span&gt; Reference Platform, either on virtual
hardware (&lt;span class="caps"&gt;QEMU&lt;/span&gt;) or in firmware (&lt;span class="caps"&gt;TF&lt;/span&gt;-A + &lt;span class="caps"&gt;EDK2&lt;/span&gt;).&lt;/p&gt;
&lt;p&gt;None of Arm hardware I use at home is &lt;span class="caps"&gt;SBSA&lt;/span&gt; compliant. Running &lt;span class="caps"&gt;BSA&lt;/span&gt; &lt;span class="caps"&gt;ACS&lt;/span&gt; on some of
those causes them to hang. I do not expect this situation to change in the
coming&amp;nbsp;months.&lt;/p&gt;
&lt;p&gt;The current page will remain online but I do not plan to invest time in updating&amp;nbsp;it.&lt;/p&gt;</content><category term="linaro"/><category term="aarch64"/><category term="sbsa"/><category term="bsa"/></entry><entry><title>Leaving Linaro for 3rd time</title><link href="https://marcin.juszkiewicz.com.pl/2024/12/18/leaving-linaro-for-3rd-time/" rel="alternate"/><published>2024-12-18T16:26:00+01:00</published><updated>2024-12-18T16:26:00+01:00</updated><author><name>Marcin Juszkiewicz</name></author><id>tag:marcin.juszkiewicz.com.pl,2024-12-18:/2024/12/18/leaving-linaro-for-3rd-time/</id><summary type="html">It was a good&amp;nbsp;time.</summary><content type="html">&lt;p&gt;Some time ago I was informed that Red Hat will not prolong membership for Linaro
DataCentre Group. Which for me means end of my 2nd adventure with&amp;nbsp;Linaro.&lt;/p&gt;
&lt;!--MORE--&gt;

&lt;h3&gt;Third&amp;nbsp;time???&lt;/h3&gt;
&lt;p&gt;I was in Linaro from April 2010 to end of May 2013 and then from April 2016 to
end of current month. So two&amp;nbsp;times.&lt;/p&gt;
&lt;p&gt;But I was leaving Linaro twice in past. First in
&lt;a href="/2012/10/26/so-long-and-thanks-for-all-the-fish/"&gt;October 2012&lt;/a&gt; when someone
decided that it is not the time yet for me to go. And then in
&lt;a href="/2013/05/31/my-time-at-linaro-is-over/"&gt;May 2013&lt;/a&gt; when I finally&amp;nbsp;left.&lt;/p&gt;
&lt;h3&gt;The&amp;nbsp;work&lt;/h3&gt;
&lt;p&gt;Those eight and half years of Linaro work were a good&amp;nbsp;time.&lt;/p&gt;
&lt;h4&gt;OpenStack&lt;/h4&gt;
&lt;p&gt;First we were doing OpenStack. Went from &amp;#8220;needs hacks&amp;#8221; to be ready out of the
box for use. During 6 years I did hundreds of patches and countless&amp;nbsp;reviews.&lt;/p&gt;
&lt;p&gt;In meantime cloud providers started providing Arm instances and pressure to keep
OpenStack working became smaller. Why maintain whole infrastructure when you can
rent virtual&amp;nbsp;one?&lt;/p&gt;
&lt;p&gt;Part of that jobs was extending CirrOS images to behave properly on &lt;span class="caps"&gt;UEFI&lt;/span&gt; systems
(AArch64 and x86-64). Defined &lt;span class="caps"&gt;CI&lt;/span&gt; jobs, handled migration to Github and helped
with several&amp;nbsp;releases.&lt;/p&gt;
&lt;p&gt;There was some work done on distribution images as&amp;nbsp;well.&lt;/p&gt;
&lt;h4&gt;&lt;span class="caps"&gt;SBSA&lt;/span&gt; Reference&amp;nbsp;Platform&lt;/h4&gt;
&lt;p&gt;Then moved to &lt;span class="caps"&gt;SBSA&lt;/span&gt; Reference Platform. This was interesting in the beginning. I
had a feeling of being more of a manager than developer. Had to collect ideas
from everyone who worked on it and get something working and being acceptable by&amp;nbsp;upstream.&lt;/p&gt;
&lt;p&gt;This ended as internal versioning of platform and then we started adding more
features and upgrading platform whenever something interesting landed in &lt;span class="caps"&gt;QEMU&lt;/span&gt;.&amp;nbsp;Now &lt;code&gt;sbsa-ref&lt;/code&gt; uses Neoverse-N2 cpu by default, can be used with &lt;span class="caps"&gt;NUMA&lt;/span&gt; setup,
have defined cpu topology and&amp;nbsp;more.&lt;/p&gt;
&lt;p&gt;Learnt firmware stuff (&lt;span class="caps"&gt;TF&lt;/span&gt;-A, &lt;span class="caps"&gt;EDK2&lt;/span&gt;), reviewed countless patches&amp;nbsp;etc.&lt;/p&gt;
&lt;p&gt;Too bad that during those years I was not able to buy any &lt;span class="caps"&gt;SBSA&lt;/span&gt; compliant
hardware below 2000 &lt;span class="caps"&gt;EUR&lt;/span&gt;&amp;nbsp;:(&lt;/p&gt;
&lt;h4&gt;Continuous&amp;nbsp;Integration&lt;/h4&gt;
&lt;p&gt;One of my tasks during whole Linaro time was handling Continuous Integration.
Defining new jobs, taking care of old ones, maintaining machines we used as
Jenkins&amp;nbsp;runners.&lt;/p&gt;
&lt;p&gt;This took me into interesting places. There was a lot of Python. I even managed
to be involved&amp;nbsp;in &lt;code&gt;manylinux&lt;/code&gt; images used to build Python&amp;nbsp;packages.&lt;/p&gt;
&lt;h3&gt;What&amp;#8217;s&amp;nbsp;next?&lt;/h3&gt;
&lt;p&gt;I am moving back to Red Hat. There are some positions open where I may fit so
have to take a look and&amp;nbsp;choose.&lt;/p&gt;</content><category term="linaro"/><category term="red hat"/><category term="development"/><category term="arm"/><category term="aarch64"/></entry><entry><title>Arm laptops for normal users?</title><link href="https://marcin.juszkiewicz.com.pl/2024/08/16/arm-laptops-for-normal-users/" rel="alternate"/><published>2024-08-16T17:33:00+02:00</published><updated>2024-08-16T17:33:00+02:00</updated><author><name>Marcin Juszkiewicz</name></author><id>tag:marcin.juszkiewicz.com.pl,2024-08-16:/2024/08/16/arm-laptops-for-normal-users/</id><summary type="html">Not there yet.&amp;nbsp;Sorry.</summary><content type="html">&lt;p&gt;There are discussions in development circles about Arm powered laptops since
forever. But most of time they do not mention &amp;#8220;normal&amp;#8221; users. Like your parents,
spouses, kids who are not developers. People who turn computer on (cold boot or
from suspend does not matter) and expect them to &amp;#8220;just&amp;nbsp;work&amp;#8221;.&lt;/p&gt;
&lt;!--MORE--&gt;

&lt;p&gt;My teenage daughter is one of them. Her current laptop is one of Thinkpad
models, previous one was Thinkpad as well. Fedora Linux as operating system
serves her needs just fine. But despite my 20 years of work with Arm
architecture I am unable to get Arm based laptop for&amp;nbsp;her.&lt;/p&gt;
&lt;h3&gt;Choices&lt;/h3&gt;
&lt;p&gt;There are several Arm powered laptops on a&amp;nbsp;market:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Macbooks&lt;/li&gt;
&lt;li&gt;Windows on Arm&amp;nbsp;laptops&lt;/li&gt;
&lt;li&gt;Chromebooks&lt;/li&gt;
&lt;li&gt;&lt;abbr title="Seriously Bad Computers"&gt;SBCs&lt;/abbr&gt; with screen like Pinebook&amp;nbsp;Pro&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;And all of them have issues when it comes to using Fedora Linux on&amp;nbsp;them.&lt;/p&gt;
&lt;h3&gt;Macbooks&lt;/h3&gt;
&lt;p&gt;Thanks to Asahi Linux team we can run Fedora Linux on M1/M2 based Macbooks.
Which means second hand market as Apple does not sell those models any more
(unless &lt;span class="caps"&gt;8GB&lt;/span&gt; of ram is enough for&amp;nbsp;you).&lt;/p&gt;
&lt;p&gt;There are many things which are not&amp;nbsp;supported:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Thunderbolt&lt;/li&gt;
&lt;li&gt;DisplayPort over&amp;nbsp;Thunderbolt&lt;/li&gt;
&lt;li&gt;&lt;span class="caps"&gt;HDMI&lt;/span&gt; audio (work in&amp;nbsp;progress)&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;So you pay for hardware and have features which you cannot use. I use Macbook
Pro 2021 (with M1 Pro cpu) for local development and stopped checking how work&amp;nbsp;goes.&lt;/p&gt;
&lt;h3&gt;Windows on Arm&amp;nbsp;laptops&lt;/h3&gt;
&lt;p&gt;Qualcomm managed to convince Microsoft to not offer licenses for other vendors
which means all we can have are Snapdragon based laptops. Which may work nice
under &lt;span class="caps"&gt;MS&lt;/span&gt; Windows but if you want to use Linux then &amp;#8220;good luck&amp;#8221; is all you can
get from&amp;nbsp;me.&lt;/p&gt;
&lt;p&gt;Some things work, some do not. I was told that Thinkpad x13s is one of best
supported models. Johan Hovold has a &lt;a href="https://github.com/jhovold/linux/wiki/X13s"&gt;Thinkpad x13s status page&lt;/a&gt;
which lists what works and what needs to be done to have some kind of working&amp;nbsp;laptop.&lt;/p&gt;
&lt;p&gt;Definitely not a system for daily use for normal Linux&amp;nbsp;user.&lt;/p&gt;
&lt;h3&gt;Chromebooks&lt;/h3&gt;
&lt;p&gt;Laptop to run web browser and Android apps. If this is all you need then go for
it. But avoid if you are &amp;#8220;normal&amp;#8221; user and want to run&amp;nbsp;Linux.&lt;/p&gt;
&lt;p&gt;Finding how to enable running anything other than ChromeOS may involve digging
through Internet pages, finding how to override &amp;#8216;write protection&amp;#8217;&amp;nbsp;etc.&lt;/p&gt;
&lt;p&gt;Just no. Also Arm ones are usually ram&amp;nbsp;limited.&lt;/p&gt;
&lt;h3&gt;Pinebook Pro and other &lt;abbr title="Seriously Bad Computers"&gt;SBCs&lt;/abbr&gt; with&amp;nbsp;screen&lt;/h3&gt;
&lt;p&gt;Those are systems for developers only. Normal users should avoid using them as
those systems require someone who knows how to prepare them to work at&amp;nbsp;all.&lt;/p&gt;
&lt;p&gt;Find/build proper firmware, put it properly in device (&lt;span class="caps"&gt;SPI&lt;/span&gt; Flash or storage
media), keeping things up-to-date may end with partially not working device&amp;nbsp;etc.&lt;/p&gt;
&lt;p&gt;For developers those are &amp;#8216;issues&amp;#8217; to workaround/solve but for normal users it
may be &amp;#8216;update went in background and now all I have is black&amp;nbsp;screen&amp;#8217;.&lt;/p&gt;
&lt;p&gt;And like with Chromebooks you may be limited by ram size (Pinebook Pro has only
&lt;span class="caps"&gt;4GB&lt;/span&gt;&amp;nbsp;ram).&lt;/p&gt;
&lt;h3&gt;Conclusion&lt;/h3&gt;
&lt;p&gt;If you are a normal user who wants to run Linux on a laptop then maybe stay away
from Arm powered ones. Leave them for developers and check once/twice per year
to see how situation&amp;nbsp;looks.&lt;/p&gt;</content><category term="aarch64"/><category term="linaro"/><category term="debian"/><category term="fedora"/></entry><entry><title>Linaro Connect MAD24</title><link href="https://marcin.juszkiewicz.com.pl/2024/06/14/linaro-connect-mad24/" rel="alternate"/><published>2024-06-14T13:04:00+02:00</published><updated>2024-06-14T13:04:00+02:00</updated><author><name>Marcin Juszkiewicz</name></author><id>tag:marcin.juszkiewicz.com.pl,2024-06-14:/2024/06/14/linaro-connect-mad24/</id><summary type="html">It was a great&amp;nbsp;conference.</summary><content type="html">&lt;p&gt;Nowadays we have only one Connect per year. And this year we met in Madrid,&amp;nbsp;Spain.&lt;/p&gt;
&lt;p&gt;How did it go for me? Good, better than the previous&amp;nbsp;one. &lt;/p&gt;
&lt;!--MORE--&gt;

&lt;p&gt;I attended most of the talks I wanted to see, spoke with countless people, and
met most of the people on my &amp;#8220;to meet&amp;#8221;&amp;nbsp;list.&lt;/p&gt;
&lt;h3&gt;SystemReady related&amp;nbsp;talks&lt;/h3&gt;
&lt;p&gt;For me, the main topic at Linaro Connect was SystemReady. There was a track for
SystemReady &lt;span class="caps"&gt;IR&lt;/span&gt; on the first day and the next days included additional&amp;nbsp;presentations.&lt;/p&gt;
&lt;h4&gt;Does SystemReady &lt;span class="caps"&gt;IR&lt;/span&gt; &amp;#8220;Just&amp;nbsp;Work&amp;#8221;?&lt;/h4&gt;
&lt;p&gt;Jon Humphreys from Texas Instruments gave an introduction what SystemReady is.
Explained how systems operated before it, the definition of &amp;#8220;Just Works&amp;#8221;, and
some aspects of testing. He then discussed issues with the current certification
process, such as missing firmware files used during testing and problems with
errata documents. He also offered recommendations on how to improve the&amp;nbsp;situation.&lt;/p&gt;
&lt;p&gt;&lt;a
                    href="https://www.youtube.com/watch?v=a1DaNV9ngSw"
                class="youtube_video" alt="YouTube Video"
                title="Click to view on YouTube"
                target="_blank" rel="noopener noreferrer"&gt;
                    &lt;img width="1280" height="720"
                        src="https://img.youtube.com/vi/a1DaNV9ngSw/maxresdefault.jpg"&gt;
                &lt;/a&gt;&lt;/p&gt;
&lt;h4&gt;Looking back on SystemReady &lt;span class="caps"&gt;IR&lt;/span&gt;&lt;/h4&gt;
&lt;p&gt;Vincent Stehlé from Arm spoke a lot about of history and timelines of involved
specifications, the U-Boot features timeline and several statistics about
SystemReady certifications along with lessons&amp;nbsp;learned.&lt;/p&gt;
&lt;p&gt;30.9% of certified systems were for &lt;span class="caps"&gt;IR&lt;/span&gt; band (only &lt;span class="caps"&gt;SR&lt;/span&gt; was higher with 36%),
mostly for older versions of the&amp;nbsp;specification.&lt;/p&gt;
&lt;p&gt;We learned that there are three certification labs besides Arm itself. And the
plan is to eventually remove Arm from this&amp;nbsp;role.&lt;/p&gt;
&lt;p&gt;It was interesting to see which distributions were used during &lt;span class="caps"&gt;IR&lt;/span&gt; certification.
Fedora Linux leads with 33.9%, followed by openSUSE at 33% and Debian at 21.1%.
Other distributions include Ubuntu, &lt;span class="caps"&gt;SLES&lt;/span&gt;, Rocky Linux and &lt;span class="caps"&gt;RHEL&lt;/span&gt;.&lt;/p&gt;
&lt;p&gt;&lt;a
                    href="https://www.youtube.com/watch?v=jtUTLL9FALY"
                class="youtube_video" alt="YouTube Video"
                title="Click to view on YouTube"
                target="_blank" rel="noopener noreferrer"&gt;
                    &lt;img width="1280" height="720"
                        src="https://img.youtube.com/vi/jtUTLL9FALY/maxresdefault.jpg"&gt;
                &lt;/a&gt;&lt;/p&gt;
&lt;h4&gt;U-Boot for SystemReady &lt;span class="caps"&gt;IR&lt;/span&gt; &amp;#8212; Status and&amp;nbsp;struggles&lt;/h4&gt;
&lt;p&gt;Ilias Apalodimas from Linaro presented the history of U-Boot getting features
required for SystemReady &lt;span class="caps"&gt;IR&lt;/span&gt; support. He highlighted some common issues and
offered suggestions for&amp;nbsp;improvement.&lt;/p&gt;
&lt;p&gt;This talk nicely expanded on the topics mentioned in the previous two&amp;nbsp;talks.&lt;/p&gt;
&lt;p&gt;&lt;a
                    href="https://www.youtube.com/watch?v=TMkP02cWdR0"
                class="youtube_video" alt="YouTube Video"
                title="Click to view on YouTube"
                target="_blank" rel="noopener noreferrer"&gt;
                    &lt;img width="1280" height="720"
                        src="https://img.youtube.com/vi/TMkP02cWdR0/maxresdefault.jpg"&gt;
                &lt;/a&gt;&lt;/p&gt;
&lt;h4&gt;SystemReady as default option for BSPs: Findings from the last SystemReady IoT&amp;nbsp;workshop&lt;/h4&gt;
&lt;p&gt;Ilias Apalodimas, Pere Garcia Gutiérrez and Peter Robinson presented
conclusions from SystemReady&amp;#8217;s Advisory Committee&amp;nbsp;workshop.&lt;/p&gt;
&lt;p&gt;One idea was that SoC vendors should provide &lt;span class="caps"&gt;BSP&lt;/span&gt; setup in a way that the
resulting firmware would already be SystemReady compliant. This would make it
easier for &lt;span class="caps"&gt;OEM&lt;/span&gt;/&lt;span class="caps"&gt;ODM&lt;/span&gt; vendors, with some following their own paths while others
adhered to the&amp;nbsp;guidelines.&lt;/p&gt;
&lt;p&gt;&lt;a
                    href="https://www.youtube.com/watch?v=z4DrhQ-0MwU"
                class="youtube_video" alt="YouTube Video"
                title="Click to view on YouTube"
                target="_blank" rel="noopener noreferrer"&gt;
                    &lt;img width="1280" height="720"
                        src="https://img.youtube.com/vi/z4DrhQ-0MwU/maxresdefault.jpg"&gt;
                &lt;/a&gt;&lt;/p&gt;
&lt;h4&gt;Qualcomm and SystemReady &lt;span class="caps"&gt;IR&lt;/span&gt;, an overview of Qualcomm support in U-Boot and what the&amp;nbsp;future&lt;/h4&gt;
&lt;p&gt;Caleb Connolly from Linaro shared the story how Qualcomm support in U-Boot
improved from terrible to good. He mentioned several quirks and issues
encountered along the&amp;nbsp;way.&lt;/p&gt;
&lt;p&gt;&lt;a
                    href="https://www.youtube.com/watch?v=EydhdB6zMy0"
                class="youtube_video" alt="YouTube Video"
                title="Click to view on YouTube"
                target="_blank" rel="noopener noreferrer"&gt;
                    &lt;img width="1280" height="720"
                        src="https://img.youtube.com/vi/EydhdB6zMy0/maxresdefault.jpg"&gt;
                &lt;/a&gt;&lt;/p&gt;
&lt;h4&gt;Arm System Architecture and SystemReady&amp;nbsp;Update&lt;/h4&gt;
&lt;p&gt;Dong Wei from Arm provided updates on changes to the SystemReady&amp;nbsp;specifications.&lt;/p&gt;
&lt;p&gt;I somehow missed that session. It was on my list, but I got distracted by a&amp;nbsp;discussion.&lt;/p&gt;
&lt;p&gt;He explained how changes are managed and reminded us how SystemReady bands
depend on specifications. Then presented planned changes to &lt;span class="caps"&gt;BSA&lt;/span&gt;, such as creation
of &lt;span class="caps"&gt;VBSA&lt;/span&gt; for virtual environments and increase of requirements for future&amp;nbsp;versions.&lt;/p&gt;
&lt;p&gt;Another change mentioned was that the SystemReady &lt;span class="caps"&gt;LS&lt;/span&gt; and &lt;span class="caps"&gt;LBBR&lt;/span&gt; recipe of &lt;span class="caps"&gt;BBR&lt;/span&gt;
might be deprecated due to lack of&amp;nbsp;interest.&lt;/p&gt;
&lt;p&gt;There will be some changes for the &lt;span class="caps"&gt;SBSA&lt;/span&gt; requirements. So far there are no plans
to create &lt;span class="caps"&gt;SBSA&lt;/span&gt; level 8, but if a silicon vendor can fulfil all future
requirements, Arm may consider publishing &lt;span class="caps"&gt;SBSA&lt;/span&gt; level&amp;nbsp;8.&lt;/p&gt;
&lt;p&gt;The &lt;span class="caps"&gt;BBSR&lt;/span&gt; (Boot Base Security Requirements) specification may become a
requirement for future SystemReady&amp;nbsp;versions.&lt;/p&gt;
&lt;p&gt;&lt;a
                    href="https://www.youtube.com/watch?v=48QOAIsIl4o"
                class="youtube_video" alt="YouTube Video"
                title="Click to view on YouTube"
                target="_blank" rel="noopener noreferrer"&gt;
                    &lt;img width="1280" height="720"
                        src="https://img.youtube.com/vi/48QOAIsIl4o/maxresdefault.jpg"&gt;
                &lt;/a&gt;&lt;/p&gt;
&lt;h4&gt;&lt;span class="caps"&gt;SBSA&lt;/span&gt; Reference Platform in &lt;span class="caps"&gt;QEMU&lt;/span&gt; status&amp;nbsp;update&lt;/h4&gt;
&lt;p&gt;I gave a talk presenting what we achieved in the past year regarding the &lt;span class="caps"&gt;SBSA&lt;/span&gt;
Reference Platform in &lt;span class="caps"&gt;QEMU&lt;/span&gt;, Trusted Firmware and &lt;span class="caps"&gt;EDK2&lt;/span&gt;&amp;nbsp;projects.&lt;/p&gt;
&lt;p&gt;I discussed changes to virtual hardware, firmware and the methods we use to
transfer configuration data between layers. I explained why I use &amp;#8220;Datatree&amp;#8221;
term instead of &amp;#8220;Devicetree&amp;#8221; and outlined our plans for the&amp;nbsp;future.&lt;/p&gt;
&lt;p&gt;&lt;a
                    href="https://www.youtube.com/watch?v=bC31EYx4DQU"
                class="youtube_video" alt="YouTube Video"
                title="Click to view on YouTube"
                target="_blank" rel="noopener noreferrer"&gt;
                    &lt;img width="1280" height="720"
                        src="https://img.youtube.com/vi/bC31EYx4DQU/maxresdefault.jpg"&gt;
                &lt;/a&gt;&lt;/p&gt;
&lt;h3&gt;Other&amp;nbsp;sessions&lt;/h3&gt;
&lt;p&gt;I attended other sessions as well and watched several ones I missed due to
discussions or schedule conflicts. Here I want to write about some of&amp;nbsp;them.&lt;/p&gt;
&lt;h4&gt;TianoCore community&amp;nbsp;update&lt;/h4&gt;
&lt;p&gt;Leif Lindholm provided an introduction and updates on the TianoCore &lt;span class="caps"&gt;EDK2&lt;/span&gt;&amp;nbsp;project.&lt;/p&gt;
&lt;p&gt;He covered which specifications it implements, how repositories are structured,
the licenses used and the communication methods. Also discussed updates to
&lt;span class="caps"&gt;SSL&lt;/span&gt;/&lt;span class="caps"&gt;TLS&lt;/span&gt; libraries and toolchain profiles, contribution rules and recent changes
to there&amp;nbsp;rules.&lt;/p&gt;
&lt;p&gt;Additionally, he outlined plans for changes to edk2-platforms such as creating
stable tags and implementing automated &lt;span class="caps"&gt;CI&lt;/span&gt;.&lt;/p&gt;
&lt;p&gt;&lt;a
                    href="https://www.youtube.com/watch?v=17iFW7XJkeQ"
                class="youtube_video" alt="YouTube Video"
                title="Click to view on YouTube"
                target="_blank" rel="noopener noreferrer"&gt;
                    &lt;img width="1280" height="720"
                        src="https://img.youtube.com/vi/17iFW7XJkeQ/maxresdefault.jpg"&gt;
                &lt;/a&gt;&lt;/p&gt;
&lt;h4&gt;An Arm laptop project&amp;nbsp;conclusion&lt;/h4&gt;
&lt;p&gt;Johan Hovold shared information about the state of Linux on the Lenovo Thinkpad
x13s laptop (which comes with Windows for Arm by&amp;nbsp;default).&lt;/p&gt;
&lt;p&gt;The good part is that most of the support is already merged into upstream
projects and the required kernel configuration changes have been included in
several&amp;nbsp;distributions.&lt;/p&gt;
&lt;p&gt;The bad part? There is still a lot of work to be done. I wonder when vendors
will learn how to write proper &lt;span class="caps"&gt;ACPI&lt;/span&gt; tables (x13s uses Devicetree to run&amp;nbsp;Linux).&lt;/p&gt;
&lt;p&gt;&lt;a
                    href="https://www.youtube.com/watch?v=Ub_eDSw9OzY"
                class="youtube_video" alt="YouTube Video"
                title="Click to view on YouTube"
                target="_blank" rel="noopener noreferrer"&gt;
                    &lt;img width="1280" height="720"
                        src="https://img.youtube.com/vi/Ub_eDSw9OzY/maxresdefault.jpg"&gt;
                &lt;/a&gt;&lt;/p&gt;
&lt;h4&gt;Rethinking the kernel system call&amp;nbsp;entry&lt;/h4&gt;
&lt;p&gt;Arnd Bergmann from Linaro spoke about his work on rethinking the Linux kernel
system call&amp;nbsp;entry.&lt;/p&gt;
&lt;p&gt;He covered how system calls are currently defined now in the Linux kernel. Then
showed how he changed it to be more&amp;nbsp;readable.&lt;/p&gt;
&lt;p&gt;I have my &lt;a href="https://gpages.juszkiewicz.com.pl/syscalls-table/syscalls.html"&gt;system calls table&lt;/a&gt;
but had never looked how kernel code for them looks. Turned out that it can
be quite intimidating with macros expanded to macros resulting in complex C&amp;nbsp;code.&lt;/p&gt;
&lt;p&gt;Arnd showed that it can be made readable. I hope that his work will land in the
Linux kernel&amp;nbsp;soon.&lt;/p&gt;
&lt;p&gt;&lt;a
                    href="https://www.youtube.com/watch?v=bdFILtH_q10"
                class="youtube_video" alt="YouTube Video"
                title="Click to view on YouTube"
                target="_blank" rel="noopener noreferrer"&gt;
                    &lt;img width="1280" height="720"
                        src="https://img.youtube.com/vi/bdFILtH_q10/maxresdefault.jpg"&gt;
                &lt;/a&gt;&lt;/p&gt;
&lt;h3&gt;End&amp;nbsp;words&lt;/h3&gt;
&lt;p&gt;Linaro Connect &lt;span class="caps"&gt;MAD24&lt;/span&gt; was a success. I got ideas for blog posts, met people who
read my&amp;nbsp;posts.&lt;/p&gt;
&lt;p&gt;And if you want to watch more talks from conference then there is &lt;a href="https://www.youtube.com/playlist?list=PLKZSArYQptsNbf0MwdAqdiYtR7RVlXhYO"&gt;official
Linaro Connect &lt;span class="caps"&gt;MAD24&lt;/span&gt; playlist on
YouTube&lt;/a&gt;.&lt;/p&gt;
&lt;p&gt;Visit &lt;a href="https://resources.linaro.org/en/events/aB7YhxBChAg7Qj3eyjG2UE"&gt;Linaro Resources Hub&lt;/a&gt;
for video recordings and presentation&amp;nbsp;slides.&lt;/p&gt;</content><category term="aarch64"/><category term="arm"/><category term="travels"/><category term="conferences"/><category term="linaro"/></entry><entry><title>ConfigurationManager in EDK2: just say no</title><link href="https://marcin.juszkiewicz.com.pl/2024/04/16/configurationmanager-in-edk2-just-say-no/" rel="alternate"/><published>2024-04-16T09:44:00+02:00</published><updated>2024-04-16T09:44:00+02:00</updated><author><name>Marcin Juszkiewicz</name></author><id>tag:marcin.juszkiewicz.com.pl,2024-04-16:/2024/04/16/configurationmanager-in-edk2-just-say-no/</id><summary type="html">There are better things for thousand lines of&amp;nbsp;code.</summary><content type="html">&lt;p&gt;During my work on &lt;span class="caps"&gt;SBSA&lt;/span&gt; Reference Platform I have spent lot of time in firmware&amp;#8217;s
code. Which mostly meant Tianocore &lt;span class="caps"&gt;EDK2&lt;/span&gt; as Trusted Firmware is quite&amp;nbsp;small.&lt;/p&gt;
&lt;p&gt;Writing all those &lt;span class="caps"&gt;ACPI&lt;/span&gt; tables by hand takes time. So I checked
ConfigurationManager component which can do it for&amp;nbsp;me.&lt;/p&gt;
&lt;!--MORE--&gt;

&lt;h3&gt;Introduction&lt;/h3&gt;
&lt;p&gt;In 2018 Sami Mujawar from Arm contributed Dynamic Tables Framework to Tianocore
&lt;span class="caps"&gt;EDK2&lt;/span&gt; project. The goal was to have code which generates all &lt;span class="caps"&gt;ACPI&lt;/span&gt; tables from
all those data structs describing hardware which &lt;span class="caps"&gt;EDK2&lt;/span&gt; already&amp;nbsp;has.&lt;/p&gt;
&lt;p&gt;In 2023 I was writing code for &lt;span class="caps"&gt;IORT&lt;/span&gt; and &lt;span class="caps"&gt;GTDT&lt;/span&gt; tables to generate them from C. And
started wondering about use of&amp;nbsp;ConfigurationManager.&lt;/p&gt;
&lt;p&gt;Mailed edk2-devel &lt;span class="caps"&gt;ML&lt;/span&gt; for pointers, documentation, hints. Got nothing in return,
idea went to the&amp;nbsp;shelf.&lt;/p&gt;
&lt;h3&gt;&lt;span class="caps"&gt;SBSA&lt;/span&gt;-Ref and multiple &lt;span class="caps"&gt;PCI&lt;/span&gt; Express&amp;nbsp;buses&lt;/h3&gt;
&lt;p&gt;Last week I got &lt;span class="caps"&gt;SBSA&lt;/span&gt;-Ref system booting in &lt;span class="caps"&gt;NUMA&lt;/span&gt; configuration with three
separate &lt;span class="caps"&gt;PCI&lt;/span&gt; Express buses. And started working on getting &lt;span class="caps"&gt;EDK2&lt;/span&gt; firmware to
recognize them as&amp;nbsp;such.&lt;/p&gt;
&lt;p&gt;Took me a day&amp;nbsp;and &lt;code&gt;pci&lt;/code&gt; command listed cards&amp;nbsp;properly:&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;Shell&amp;gt; pci
   Seg  Bus  Dev  Func
   ---  ---  ---  ----
    00   00   00    00 ==&amp;gt; Bridge Device - Host/PCI bridge
             Vendor 1B36 Device 0008 Prog Interface 0
    00   00   01    00 ==&amp;gt; Network Controller - Ethernet controller
             Vendor 8086 Device 10D3 Prog Interface 0
    00   00   02    00 ==&amp;gt; Bridge Device - PCI/PCI bridge
             Vendor 1B36 Device 000C Prog Interface 0
    00   00   03    00 ==&amp;gt; Bridge Device - Host/PCI bridge
             Vendor 1B36 Device 000B Prog Interface 0
    00   00   04    00 ==&amp;gt; Bridge Device - Host/PCI bridge
             Vendor 1B36 Device 000B Prog Interface 0
    00   01   00    00 ==&amp;gt; Mass Storage Controller - Non-volatile memory subsystem
             Vendor 1B36 Device 0010 Prog Interface 2
    00   40   00    00 ==&amp;gt; Bridge Device - PCI/PCI bridge
             Vendor 1B36 Device 000C Prog Interface 0
    00   40   01    00 ==&amp;gt; Bridge Device - PCI/PCI bridge
             Vendor 1B36 Device 000C Prog Interface 0
    00   41   00    00 ==&amp;gt; Base System Peripherals - SD Host controller
             Vendor 1B36 Device 0007 Prog Interface 1
    00   42   00    00 ==&amp;gt; Display Controller - Other display controller
             Vendor 1234 Device 1111 Prog Interface 0
    00   80   00    00 ==&amp;gt; Bridge Device - PCI/PCI bridge
             Vendor 1B36 Device 000E Prog Interface 0
    00   80   01    00 ==&amp;gt; Bridge Device - PCI/PCI bridge
             Vendor 1B36 Device 000C Prog Interface 0
    00   81   09    00 ==&amp;gt; Multimedia Device - Audio device
             Vendor 1274 Device 5000 Prog Interface 0
    00   81   10    00 ==&amp;gt; Network Controller - Ethernet controller
             Vendor 8086 Device 100E Prog Interface 0
    00   82   00    00 ==&amp;gt; Mass Storage Controller - Serial ATA controller
             Vendor 8086 Device 2922 Prog Interface 1
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;Three buses are: 0x00, 0x40 and 0x80. But then I had to tell Operating System
about those. Which meant playing with &lt;span class="caps"&gt;ACPI&lt;/span&gt; tables code in&amp;nbsp;C.&lt;/p&gt;
&lt;p&gt;So idea came &amp;#8220;what about trying&amp;nbsp;ConfigurationManager?&amp;#8221;.&lt;/p&gt;
&lt;h3&gt;Another&amp;nbsp;try&lt;/h3&gt;
&lt;p&gt;Mailed edk2-devel &lt;span class="caps"&gt;ML&lt;/span&gt; again for pointers, documentation hints. And then looked at
code written for &lt;span class="caps"&gt;N1SDP&lt;/span&gt; and started playing with&amp;nbsp;ConfigurationManager&amp;#8230;&lt;/p&gt;
&lt;p&gt;ConfigurationManager.c has EDKII_PLATFORM_REPOSITORY_INFO struct with
hundreds of lines of data (as another structs). From listing which &lt;span class="caps"&gt;ACPI&lt;/span&gt; tables I
want to have (&lt;span class="caps"&gt;FADT&lt;/span&gt;, &lt;span class="caps"&gt;GTDT&lt;/span&gt;, &lt;span class="caps"&gt;APIC&lt;/span&gt;, &lt;span class="caps"&gt;SPCR&lt;/span&gt;, &lt;span class="caps"&gt;DBG2&lt;/span&gt;, &lt;span class="caps"&gt;IORT&lt;/span&gt;, &lt;span class="caps"&gt;MCFG&lt;/span&gt;, &lt;span class="caps"&gt;SRAT&lt;/span&gt;, &lt;span class="caps"&gt;DSDT&lt;/span&gt;, &lt;span class="caps"&gt;PPTT&lt;/span&gt; etc.)
to listing all hardware details like &lt;span class="caps"&gt;GIC&lt;/span&gt;, PCIe, Timers, &lt;span class="caps"&gt;CPU&lt;/span&gt; and Memory&amp;nbsp;information.&lt;/p&gt;
&lt;p&gt;Then code for querying this struct. I thought that &lt;span class="caps"&gt;CM&lt;/span&gt;/&lt;span class="caps"&gt;DT&lt;/span&gt;
(ConfigurationManager/DynamicTables) framework will have those already in &lt;span class="caps"&gt;EDK2&lt;/span&gt;
code but no &amp;#8212; each platform has own set of functions. Another hundreds of lines
to&amp;nbsp;maintain.&lt;/p&gt;
&lt;p&gt;Took some time to get it built, then started filling proper data and compared
with &lt;span class="caps"&gt;ACPI&lt;/span&gt; tables I had previously. There were differences to sort out. But
digging more and more into code I saw that I go deeper and deeper into rabbit&amp;nbsp;hole&amp;#8230;&lt;/p&gt;
&lt;h3&gt;Dynamic systems do not fit &lt;span class="caps"&gt;CM&lt;/span&gt;?&lt;/h3&gt;
&lt;p&gt;For platforms with dynamic hardware configuration (like &lt;span class="caps"&gt;SBSA&lt;/span&gt;-Ref) I needed to
write code which would populate that struct with data on runtime. Check amount
of cpu cores and write cpu information (with topology, cache etc), create all
&lt;span class="caps"&gt;GIC&lt;/span&gt; structures and mappings. Then same for PCIe buses. Etc. Etc.&amp;nbsp;etc&amp;#8230;&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;STATIC
EFI_STATUS
EFIAPI
InitializePlatformRepository (
  IN  EDKII_PLATFORM_REPOSITORY_INFO  * CONST PlatRepoInfo
  )
{
  GicInfo                 GicInfo;
  CM_ARM_GIC_REDIST_INFO *GicRedistInfo;
  CM_ARM_GIC_ITS_INFO    *GicItsInfo;
  CM_ARM_SMMUV3_NODE     *SmmuV3Info;

  GetGicDetails(&amp;amp;GicInfo);
  PlatRepoInfo-&amp;gt;GicDInfo.PhysicalBaseAddress = GicInfo.DistributorBase;

  GicRedistInfo = &amp;amp;PlatRepoInfo-&amp;gt;GicRedistInfo[0];

  GicRedistInfo-&amp;gt;DiscoveryRangeBaseAddress = GicInfo.RedistributorsBase;

  GicItsInfo = &amp;amp;PlatRepoInfo-&amp;gt;GicItsInfo[0];
  GicItsInfo-&amp;gt;PhysicalBaseAddress = GicInfo.ItsBase;

  SmmuV3Info = &amp;amp;PlatRepoInfo-&amp;gt;SmmuV3Info[0];
  SmmuV3Info-&amp;gt;BaseAddress = PcdGet64 (PcdSmmuBase);

  return EFI_SUCCESS;
}
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;Which in my case can mean even more code written to populate &lt;span class="caps"&gt;CM&lt;/span&gt; struct of
structs than it would take to generate &lt;span class="caps"&gt;ACPI&lt;/span&gt; tables by&amp;nbsp;hand.&lt;/p&gt;
&lt;h3&gt;Summary&lt;/h3&gt;
&lt;p&gt;ConfigurationManager and DynamicTables frameworks look tempting. There may be
systems where it can be used with success. I know that I do not want to touch it
again. All those structs of structs may look good for someone familiar with &lt;span class="caps"&gt;LISP&lt;/span&gt;
or &lt;span class="caps"&gt;JSON&lt;/span&gt; but not for&amp;nbsp;me.&lt;/p&gt;</content><category term="aarch64"/><category term="edk2"/><category term="linaro"/><category term="virtualization"/></entry><entry><title>DT-free EDK2 on SBSA Reference Platform</title><link href="https://marcin.juszkiewicz.com.pl/2024/04/04/dt-free-edk2-on-sbsa-reference-platform/" rel="alternate"/><published>2024-04-04T13:26:00+02:00</published><updated>2024-04-04T13:26:00+02:00</updated><author><name>Marcin Juszkiewicz</name></author><id>tag:marcin.juszkiewicz.com.pl,2024-04-04:/2024/04/04/dt-free-edk2-on-sbsa-reference-platform/</id><summary type="html">Who needs DeviceTree on SystemReady &lt;span class="caps"&gt;SR&lt;/span&gt;?</summary><content type="html">&lt;p&gt;During last weeks we worked on getting rid of DeviceTree from &lt;span class="caps"&gt;EDK2&lt;/span&gt; on &lt;span class="caps"&gt;SBSA&lt;/span&gt;
Reference Platform. And finally we&amp;nbsp;managed!&lt;/p&gt;
&lt;p&gt;All code is merged into upstream &lt;span class="caps"&gt;EDK2&lt;/span&gt;&amp;nbsp;repository.&lt;/p&gt;
&lt;!--MORE--&gt;

&lt;h3&gt;What?&lt;/h3&gt;
&lt;p&gt;Someone may wonder where DeviceTree was in &lt;span class="caps"&gt;SBSA&lt;/span&gt; Reference Platform. Wasn&amp;#8217;t it
&lt;span class="caps"&gt;UEFI&lt;/span&gt; and &lt;span class="caps"&gt;ACPI&lt;/span&gt;&amp;nbsp;platform?&lt;/p&gt;
&lt;p&gt;Yes, from Operating System point of view it is &lt;span class="caps"&gt;UEFI&lt;/span&gt; and &lt;span class="caps"&gt;ACPI&lt;/span&gt;. But if you look
deeper you will see DeviceTree hidden inside our chain of software&amp;nbsp;components:&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;/dts-v1/;

/ {
        machine-version-minor = &amp;lt;0x03&amp;gt;;
        machine-version-major = &amp;lt;0x00&amp;gt;;
        #size-cells = &amp;lt;0x02&amp;gt;;
        #address-cells = &amp;lt;0x02&amp;gt;;
        compatible = &amp;quot;linux,sbsa-ref&amp;quot;;

        chosen {
        };

        memory@10000000000 {
                reg = &amp;lt;0x100 0x00 0x00 0x40000000&amp;gt;;
                device_type = &amp;quot;memory&amp;quot;;
        };

        intc {
                reg = &amp;lt;0x00 0x40060000 0x00 0x10000
                       0x00 0x40080000 0x00 0x4000000&amp;gt;;

                its {
                        reg = &amp;lt;0x00 0x44081000 0x00 0x20000&amp;gt;;
                };
        };

        cpus {
                #size-cells = &amp;lt;0x00&amp;gt;;
                #address-cells = &amp;lt;0x02&amp;gt;;

                cpu@0 {
                        reg = &amp;lt;0x00 0x00&amp;gt;;
                };

                cpu@1 {
                        reg = &amp;lt;0x00 0x01&amp;gt;;
                };

                cpu@2 {
                        reg = &amp;lt;0x00 0x02&amp;gt;;
                };

                cpu@3 {
                        reg = &amp;lt;0x00 0x03&amp;gt;;
                };
        };
};
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;It is very minimal one, providing us with only those information we need. It
does not even pass any compliance checks. For example for Linux, &lt;span class="caps"&gt;GIC&lt;/span&gt; node
(/intc/ one) should have gazillion of fields, but we only need&amp;nbsp;addresses.&lt;/p&gt;
&lt;p&gt;Trusted Firmware reads it, parses and provides information from it via Secure
Monitor Calls (&lt;span class="caps"&gt;SMC&lt;/span&gt;) to upper firmware level (&lt;span class="caps"&gt;EDK2&lt;/span&gt; in our case). DeviceTree is
provided too but we do not read it any&amp;nbsp;more.&lt;/p&gt;
&lt;h3&gt;Why?&lt;/h3&gt;
&lt;p&gt;Our goal is to treat software components a bit different then people may expect.
&lt;span class="caps"&gt;QEMU&lt;/span&gt; is &amp;#8220;virtual hardware&amp;#8221; layer, &lt;span class="caps"&gt;TF&lt;/span&gt;-A provides interface to &amp;#8220;embedded
controller&amp;#8221; (&lt;span class="caps"&gt;EC&lt;/span&gt;) layer and &lt;span class="caps"&gt;EDK2&lt;/span&gt; is firmware layer on&amp;nbsp;top.&lt;/p&gt;
&lt;p&gt;On physical hardware firmware assumes some parts and asks &lt;span class="caps"&gt;EC&lt;/span&gt; for the rest of
system information. &lt;span class="caps"&gt;QEMU&lt;/span&gt; does not give us that, while giving us a way to alter
system configuration more than it would be possible on most of hardware
platforms using a bunch of cli&amp;nbsp;arguments.&lt;/p&gt;
&lt;p&gt;&lt;span class="caps"&gt;EDK2&lt;/span&gt; asks for &lt;span class="caps"&gt;CPU&lt;/span&gt;, &lt;span class="caps"&gt;GIC&lt;/span&gt; and Memory. When there is no info about processors or
memory, it informs the user and shutdowns the system (such situation does not
have a chance of happening but it works as an&amp;nbsp;example).&lt;/p&gt;
&lt;h3&gt;Bonus stuff: &lt;span class="caps"&gt;NUMA&lt;/span&gt;&lt;/h3&gt;
&lt;p&gt;Bonus part of this work was adding firmware support for &lt;span class="caps"&gt;NUMA&lt;/span&gt; configuration. When
&lt;span class="caps"&gt;QEMU&lt;/span&gt; is run with &lt;span class="caps"&gt;NUMA&lt;/span&gt; arguments then operating system gets whole memory and
proper configuration&amp;nbsp;information.&lt;/p&gt;
&lt;p&gt;&lt;span class="caps"&gt;QEMU&lt;/span&gt; arguments&amp;nbsp;used:&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;-smp 4,sockets=4,maxcpus=4
-m 4G,slots=2,maxmem=5G
-object memory-backend-ram,size=1G,id=m0
-object memory-backend-ram,size=3G,id=m1
-numa node,nodeid=0,cpus=0-1,memdev=m0
-numa node,nodeid=1,cpus=2,memdev=m1
-numa node,nodeid=2,cpus=3
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;How Operating System sees &lt;span class="caps"&gt;NUMA&lt;/span&gt;&amp;nbsp;information:&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;root@sbsa-ref:~# numactl --hardware
available: 3 nodes (0-2)
node 0 cpus: 0 1
node 0 size: 975 MB
node 0 free: 840 MB
node 1 cpus: 2
node 1 size: 2950 MB
node 1 free: 2909 MB
node 2 cpus: 3
node 2 size: 0 MB
node 2 free: 0 MB
node distances:
node   0   1   2
  0:  10  20  20
  1:  20  10  20
  2:  20  20  10
&lt;/code&gt;&lt;/pre&gt;
&lt;h3&gt;What&amp;nbsp;next?&lt;/h3&gt;
&lt;p&gt;There is &lt;span class="caps"&gt;CPU&lt;/span&gt; topology information in review queue. All those sockets, clusters,
cores and threads. &lt;span class="caps"&gt;QEMU&lt;/span&gt; will pass it in DeviceTree, &lt;span class="caps"&gt;TF&lt;/span&gt;-A will give it via &lt;span class="caps"&gt;SMC&lt;/span&gt;
and then &lt;span class="caps"&gt;EDK2&lt;/span&gt; will put it in one of &lt;span class="caps"&gt;ACPI&lt;/span&gt; tables (&lt;span class="caps"&gt;PPTT&lt;/span&gt; == Processor Properties
Topology&amp;nbsp;Table).&lt;/p&gt;
&lt;p&gt;If someone decide to write own firmware for &lt;span class="caps"&gt;SBSA&lt;/span&gt; Reference Platform (like port
of U-Boot) then both DeviceTree and set of &lt;span class="caps"&gt;SMC&lt;/span&gt; calls will wait for them, ready
to be used to gather hardware&amp;nbsp;information.&lt;/p&gt;</content><category term="aarch64"/><category term="sbsa"/><category term="linaro"/><category term="virtualization"/></entry><entry><title>Running SBSA Reference Platform</title><link href="https://marcin.juszkiewicz.com.pl/2024/03/25/running-sbsa-reference-platform/" rel="alternate"/><published>2024-03-25T11:21:00+01:00</published><updated>2024-03-25T11:21:00+01:00</updated><author><name>Marcin Juszkiewicz</name></author><id>tag:marcin.juszkiewicz.com.pl,2024-03-25:/2024/03/25/running-sbsa-reference-platform/</id><summary type="html">sbsa-ref can be used for testing several things&amp;nbsp;:)</summary><content type="html">&lt;p&gt;Recently people asked me how to run &lt;span class="caps"&gt;SBSA&lt;/span&gt; Reference Platform for their own
testing and development. Which shows that I should write some&amp;nbsp;documentation.&lt;/p&gt;
&lt;p&gt;But first let me blog about&amp;nbsp;it&amp;#8230;&lt;/p&gt;
&lt;!--MORE--&gt;

&lt;h3&gt;Requirements&lt;/h3&gt;
&lt;p&gt;To run &lt;span class="caps"&gt;SBSA&lt;/span&gt; Reference Platform emulation you&amp;nbsp;need:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;span class="caps"&gt;QEMU&lt;/span&gt; (8.2+&amp;nbsp;recommended)&lt;/li&gt;
&lt;li&gt;&lt;span class="caps"&gt;EDK2&lt;/span&gt; firmware&amp;nbsp;files&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;That&amp;#8217;s all. Sure, some hardware resources would be handy but everyone has some
kind of computer available,&amp;nbsp;right?&lt;/p&gt;
&lt;h4&gt;&lt;span class="caps"&gt;QEMU&lt;/span&gt;&lt;/h4&gt;
&lt;p&gt;Nothing special is required as long as you&amp;nbsp;have &lt;code&gt;qemu-system-aarch64&lt;/code&gt; binary&amp;nbsp;available.&lt;/p&gt;
&lt;h4&gt;&lt;span class="caps"&gt;EDK2&lt;/span&gt;&lt;/h4&gt;
&lt;p&gt;We provide 
&lt;a href="https://artifacts.codelinaro.org/ui/native/linaro-419-sbsa-ref/"&gt;&lt;span class="caps"&gt;EDK2&lt;/span&gt; binaries&lt;/a&gt;
on CodeLinaro server. Go to &amp;#8220;latest/edk2&amp;#8221; directory, fetch both &amp;#8220;SBSA_FLASH*&amp;#8221;
files, unpack them and you are ready to go. You may compare checksums (before
unpacking) with values present in &amp;#8220;latest/&lt;span class="caps"&gt;README&lt;/span&gt;.txt&amp;#8221;&amp;nbsp;file.&lt;/p&gt;
&lt;p&gt;Those binaries are built from release versions of Trusted Firmware (&lt;span class="caps"&gt;TF&lt;/span&gt;-A) and
Tianocore &lt;span class="caps"&gt;EDK2&lt;/span&gt; plus latest &amp;#8220;edk2-platforms&amp;#8221; code (as this repo is not using&amp;nbsp;tags).&lt;/p&gt;
&lt;h5&gt;Building &lt;span class="caps"&gt;EDK2&lt;/span&gt;&lt;/h5&gt;
&lt;p&gt;If you decide to build &lt;span class="caps"&gt;EDK2&lt;/span&gt; on your own then we provide &lt;span class="caps"&gt;TF&lt;/span&gt;-A binaries in
&amp;#8220;edk2-non-osi&amp;#8221; repository. I update those when it is&amp;nbsp;needed.&lt;/p&gt;
&lt;p&gt;Instructions to build &lt;span class="caps"&gt;EDK2&lt;/span&gt; are provided in 
&lt;a href="https://github.com/tianocore/edk2-platforms/blob/master/Platform/Qemu/SbsaQemu/Readme.md"&gt;Qemu/SbsaQemu&lt;/a&gt;
directory of &amp;#8220;edk2-platforms&amp;#8221;&amp;nbsp;repository.&lt;/p&gt;
&lt;h3&gt;Running &lt;span class="caps"&gt;SBSA&lt;/span&gt; Reference Platform&amp;nbsp;emulation&lt;/h3&gt;
&lt;p&gt;Note that this machine is fully emulated. Even on AArch64 systems where
virtualization is&amp;nbsp;available.&lt;/p&gt;
&lt;p&gt;Let go through example &lt;span class="caps"&gt;QEMU&lt;/span&gt; command&amp;nbsp;line:&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;qemu-system-aarch64
-machine sbsa-ref
-drive file=firmware/SBSA_FLASH0.fd,format=raw,if=pflash
-drive file=firmware/SBSA_FLASH1.fd,format=raw,if=pflash
-serial stdio
-device usb-kbd
-device usb-tablet
-cdrom disks/alpine-standard-3.19.1-aarch64.iso
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;At first we select &amp;#8220;sbsa-ref&amp;#8221; machine (defaults to four Neoverse-N1 cpu cores
and &lt;span class="caps"&gt;1GB&lt;/span&gt; of ram). Then we point to firmware files (order of them is&amp;nbsp;important).&lt;/p&gt;
&lt;p&gt;Serial console is useful for diagnostic output, just remember to not press
Ctrl-C there unless you want to take whole emulation&amp;nbsp;down.&lt;/p&gt;
&lt;p&gt;&lt;span class="caps"&gt;USB&lt;/span&gt; devices are to have working keyboard and pointing device. &lt;span class="caps"&gt;USB&lt;/span&gt; tablet is more
useful that &lt;span class="caps"&gt;USB&lt;/span&gt; mouse&amp;nbsp;(&lt;code&gt;-device usb-mouse&lt;/code&gt; adds it). If you want to run *&lt;span class="caps"&gt;BSD&lt;/span&gt;
operating systems then I recommend to add &lt;span class="caps"&gt;USB&lt;/span&gt;&amp;nbsp;mouse.&lt;/p&gt;
&lt;p&gt;And the last entry adds Alpine 3.19.1 &lt;span class="caps"&gt;ISO&lt;/span&gt;&amp;nbsp;image.&lt;/p&gt;
&lt;p&gt;System boots to text console on graphical output. For some reason boot console
is on serial&amp;nbsp;port.&lt;/p&gt;
&lt;h4&gt;Adding hard&amp;nbsp;disk&lt;/h4&gt;
&lt;p&gt;If you want to add hard disk then adding&amp;nbsp;&amp;#8220;&lt;code&gt;-hdb disk.img&lt;/code&gt;&amp;#8221; is enough (&amp;#8220;hdb&amp;#8221; as
cdrom took 1st slot on the &lt;span class="caps"&gt;AHCI&lt;/span&gt;&amp;nbsp;controller).&lt;/p&gt;
&lt;p&gt;Handy thing is &amp;#8220;virtual &lt;span class="caps"&gt;FAT&lt;/span&gt; drive&amp;#8221; which allows to create guest&amp;#8217;s drive from
directory on the&amp;nbsp;host:&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;-drive if=ide,file=fat:ro:DIRECTORY_ON_HOST,format=raw
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;This is useful for running &lt;span class="caps"&gt;EFI&lt;/span&gt; binaries as this drive is visible in &lt;span class="caps"&gt;UEFI&lt;/span&gt;
environment. It is not present when operating system is&amp;nbsp;booted.&lt;/p&gt;
&lt;h4&gt;Adding &lt;span class="caps"&gt;NVME&lt;/span&gt;&amp;nbsp;drive&lt;/h4&gt;
&lt;p&gt;&lt;span class="caps"&gt;NVME&lt;/span&gt; is composed from two&amp;nbsp;things:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;PCIe&amp;nbsp;device&lt;/li&gt;
&lt;li&gt;storage&amp;nbsp;drive&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;So let add it in a nice way, using PCIe&amp;nbsp;root-port:&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;-device pcie-root-port,id=root_port_for_nvme1,chassis=2,slot=0
  -device nvme,serial=deadbeef,bus=root_port_for_nvme1,drive=nvme
     -drive file=disks/nvme.img,format=raw,id=nvme,if=none
&lt;/code&gt;&lt;/pre&gt;
&lt;h4&gt;Using &lt;span class="caps"&gt;NUMA&lt;/span&gt;&amp;nbsp;configuration&lt;/h4&gt;
&lt;p&gt;&lt;span class="caps"&gt;QEMU&lt;/span&gt; can emulate Non-Uniform Memory Access (&lt;span class="caps"&gt;NUMA&lt;/span&gt;) setup. This usually means
multisocket systems with memory available per cpu&amp;nbsp;socket.&lt;/p&gt;
&lt;p&gt;Example&amp;nbsp;config:&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;-smp 4,sockets=4,maxcpus=4
-m 4G,slots=2,maxmem=5G
-object memory-backend-ram,size=1G,id=m0
-object memory-backend-ram,size=3G,id=m1
-numa node,nodeid=0,cpus=0-1,memdev=m0
-numa node,nodeid=1,cpus=2,memdev=m1
-numa node,nodeid=2,cpus=3
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;This adds four cpu sockets and &lt;span class="caps"&gt;4GB&lt;/span&gt; of memory. First node has 2 cpu cores and &lt;span class="caps"&gt;1GB&lt;/span&gt;
ram, second node has 1 cpu and &lt;span class="caps"&gt;3GB&lt;/span&gt; of ram and last node has 1 cpu without local&amp;nbsp;memory.&lt;/p&gt;
&lt;p&gt;Note that support for such setup in work in progress now (March 2024). We merged
required code into &lt;span class="caps"&gt;TF&lt;/span&gt;-A and have set of patches for &lt;span class="caps"&gt;EDK2&lt;/span&gt; in review. Without them
you will see resources only from the first &lt;span class="caps"&gt;NUMA&lt;/span&gt;&amp;nbsp;node.&lt;/p&gt;
&lt;h4&gt;Complex &lt;span class="caps"&gt;PCI&lt;/span&gt; Express&amp;nbsp;setup&lt;/h4&gt;
&lt;p&gt;Our platform has &lt;span class="caps"&gt;GIC&lt;/span&gt; &lt;span class="caps"&gt;ITS&lt;/span&gt; support so we can try some complex &lt;span class="caps"&gt;PCI&lt;/span&gt; Express&amp;nbsp;structures.&lt;/p&gt;
&lt;p&gt;This example uses PCIe switch to add more PCIe slots and then (to complicate
things) puts PCIe-to-&lt;span class="caps"&gt;PCI&lt;/span&gt; bridge into one of them to make use of old Intel e1000
network&amp;nbsp;card:&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;-device pcie-root-port,id=root_port_for_switch1,chassis=0,slot=0
  -device x3130-upstream,id=up_port1,bus=root_port_for_switch1
    -device xio3130-downstream,id=down_port1,bus=up_port1,chassis=1,slot=0
      -device ac97,bus=down_port1
    -device xio3130-downstream,id=down_port2,bus=up_port1,chassis=1,slot=1
   -device pcie-pci-bridge,id=pci1,bus=down_port2
     -device e1000,bus=pci1,addr=2
&lt;/code&gt;&lt;/pre&gt;
&lt;h3&gt;Some helper&amp;nbsp;scripts&lt;/h3&gt;
&lt;p&gt;During last year I wrote some helper scripts for working with &lt;span class="caps"&gt;SBSA&lt;/span&gt; Reference
Platform testing. They are stored in
&lt;a href="https://github.com/hrw/sbsa-ref-status"&gt;sbsa-ref-status&lt;/a&gt; repository on&amp;nbsp;GitHub.&lt;/p&gt;
&lt;p&gt;May lack up-to-date documentation but can show my way of using the&amp;nbsp;platform.&lt;/p&gt;
&lt;h3&gt;Summary&lt;/h3&gt;
&lt;p&gt;&lt;span class="caps"&gt;SBSA&lt;/span&gt; Reference Platform can be used for testing several things. From operating
systems to (S)&lt;span class="caps"&gt;BSA&lt;/span&gt; compliance of the platform. Or to check how some things are
emulated in &lt;span class="caps"&gt;QEMU&lt;/span&gt;. Or playing with PCIe setups (&lt;span class="caps"&gt;NUMA&lt;/span&gt; systems can have separate
&lt;span class="caps"&gt;PCI&lt;/span&gt; Express buses but we do not handle it yet in&amp;nbsp;firmware).&lt;/p&gt;
&lt;p&gt;Have&amp;nbsp;fun!&lt;/p&gt;</content><category term="sbsa-ref"/><category term="qemu"/><category term="virtualization"/><category term="aarch64"/><category term="linaro"/></entry><entry><title>Twenty years of my work with Arm architecture</title><link href="https://marcin.juszkiewicz.com.pl/2024/02/12/twenty-years-of-my-work-with-arm-architecture/" rel="alternate"/><published>2024-02-12T12:06:00+01:00</published><updated>2024-02-12T12:06:00+01:00</updated><author><name>Marcin Juszkiewicz</name></author><id>tag:marcin.juszkiewicz.com.pl,2024-02-12:/2024/02/12/twenty-years-of-my-work-with-arm-architecture/</id><summary type="html">It was a fantastic journey! And it does not&amp;nbsp;end.</summary><content type="html">&lt;p&gt;Twenty years ago I bought Sharp Zaurus &lt;span class="caps"&gt;SL&lt;/span&gt;-5500 Linux &lt;span class="caps"&gt;PDA&lt;/span&gt;. With StrongARM &lt;span class="caps"&gt;SA1110&lt;/span&gt;
inside. And I had no idea how it will&amp;nbsp;end&amp;#8230;&lt;/p&gt;
&lt;!--MORE--&gt;

&lt;h3&gt;Hobby&lt;/h3&gt;
&lt;p&gt;At first it was a hobby. Finding what I can do with it (compared to previous
devices running PalmOS) was fun. SharpROM, OpenZaurus 3.2, OpenZaurus 3.3-pre1
etc. New apps, taskbar&amp;nbsp;plugins&amp;#8230;&lt;/p&gt;
&lt;p&gt;Then I wanted to build something. Found an OpenZaurus toolchain, tried it and
went for help. And got &amp;#8220;forget this toolchain, we have a new toy:&amp;nbsp;OpenEmbedded&amp;#8221;.&lt;/p&gt;
&lt;p&gt;And I sunk&amp;nbsp;in&amp;#8230;&lt;/p&gt;
&lt;p&gt;Took me some time to get familiar with that (lot of n00b questions asked). Then
many attempts to get a bootable image. Turned out that my image was one of first
properly booting on a &lt;span class="caps"&gt;SL&lt;/span&gt;-5500 device. So I got write access to OpenEmbedded with
&amp;#8220;now you can merge all of it&amp;#8221;&amp;nbsp;message.&lt;/p&gt;
&lt;h4&gt;OpenZaurus&lt;/h4&gt;
&lt;p&gt;I spent three years working on OpenZaurus distribution. In my free time. Started
as a user, went through being developer and 
&lt;a href="/2006/03/18/openzaurus-354-released/"&gt;ended as a release manager&lt;/a&gt;. Through
those years I moved from my &lt;span class="caps"&gt;SL&lt;/span&gt;-5500 to the c760 (donated by user). Had several
other Zaurus models on my desk in&amp;nbsp;meantime.&lt;/p&gt;
&lt;p&gt;Those were interesting years. I learnt a lot about structure of Linux
filesystem, how packaging works, all those differences between build-time and
install-time dependencies, sorting out upgrades etc. And how to cooperate with
other developers and users. Also how to avoid those who deserve to be&amp;nbsp;ignored.&lt;/p&gt;
&lt;h3&gt;Embedded Linux&amp;nbsp;developer&lt;/h3&gt;
&lt;p&gt;At one moment working with Arm architecture stopped being hobby and became daily&amp;nbsp;work.&lt;/p&gt;
&lt;p&gt;Matthew Allum from OpenedHand proposed me a full time contract so 
&lt;a href="/2006/12/15/job-change/"&gt;I left my daily job&lt;/a&gt; (as a &lt;span class="caps"&gt;PHP&lt;/span&gt; programmer) and started
working on Poky Linux and its version of&amp;nbsp;OpenEmbedded.&lt;/p&gt;
&lt;p&gt;New devices, new interesting challenges, new co-workers and customers. Proper
development boards (those big ones with lot of interesting connectors for even
more expensive equipment), prototypes of misc&amp;nbsp;devices&amp;#8230;&lt;/p&gt;
&lt;p&gt;After OpenedHand there were other companies interested in my services. Bug Labs
with their Java based system on top of Poky Linux, Vernier with school palmtops
and others. Still embedded&amp;nbsp;Linux.&lt;/p&gt;
&lt;h3&gt;Invited&amp;nbsp;speaker&lt;/h3&gt;
&lt;p&gt;My first conference was &lt;span class="caps"&gt;FOSDEM&lt;/span&gt; 2007. And then were several other ones but I was
an attendee rather than&amp;nbsp;speaker.&lt;/p&gt;
&lt;p&gt;2009 changed it &amp;#8212; Andrea Gallo from &lt;span class="caps"&gt;ST&lt;/span&gt;-Ericsson invited me to give a talk at 
&lt;a href="/2009/10/19/st-ericsson-community-workshop-2009/"&gt;their workshop&lt;/a&gt; in
Grenoble. My presentation was about supporting their developer board &lt;span class="caps"&gt;NHK&lt;/span&gt;-15 in
Poky Linux and&amp;nbsp;OpenEmbedded.&lt;/p&gt;
&lt;p&gt;Next day was &lt;a href="/2009/10/27/elc-e-2009/"&gt;&lt;abbr title="Embedded Linux Conference Europe"&gt;&lt;span class="caps"&gt;ELCE&lt;/span&gt;&lt;/abbr&gt; where I gave a talk&lt;/a&gt; called &amp;#8220;Hacking
with OpenEmbedded&amp;#8221;. It was also conference where I met Leif Lindholm and Jon
Masters for the first&amp;nbsp;time.&lt;/p&gt;
&lt;h3&gt;Linaro&lt;/h3&gt;
&lt;p&gt;2010 came, I had over three years of paid embedded Linux work behind me.
&lt;a href="/2010/04/06/another-job-change/"&gt;Canonical asked and we signed papers.&lt;/a&gt;
Then another papers and I became one of the first 20 people working at Linaro.
To work on improving Arm support in&amp;nbsp;Linux.&lt;/p&gt;
&lt;p&gt;It was time when working with Arm meant embedded work, just using main
distributions instead of embedded ones. All those device specific kernels,
images&amp;nbsp;etc.&lt;/p&gt;
&lt;p&gt;I did cross compilation toolchains for Debian/Ubuntu, AArch64 bring up using
OpenEmbedded and several other&amp;nbsp;tasks.&lt;/p&gt;
&lt;h3&gt;Red&amp;nbsp;Hat&lt;/h3&gt;
&lt;p&gt;In 2013 I ended my contract with Canonical, 
&lt;a href="/2013/05/31/my-time-at-linaro-is-over/"&gt;left Linaro&lt;/a&gt;
and &lt;a href="/2013/08/01/new-job-senior-software-engineer-red-hat/"&gt;joined Red Hat&lt;/a&gt;.
And met the other side of Arm&amp;nbsp;world.&lt;/p&gt;
&lt;p&gt;I was not doing developer boards or &lt;span class="caps"&gt;SBC&lt;/span&gt; systems. The project was to get Red Hat
Enterprise Linux distribution running on 64-bit Arm servers. Before they even&amp;nbsp;existed&amp;#8230;&lt;/p&gt;
&lt;p&gt;It was a fun time. Native builds in very slow system emulators took hours/days.
Prototype servers were faster but also very&amp;nbsp;unstable.&lt;/p&gt;
&lt;p&gt;Anyway, we delivered. 
&lt;a href="/2015/11/20/red-hat-enterprise-linux-server-for-arm-7-2-development-preview-released/"&gt;&lt;span class="caps"&gt;RHEL&lt;/span&gt; 7.2 had AArch64 support.&lt;/a&gt;
Countless packages got fixed both in &lt;span class="caps"&gt;RHEL&lt;/span&gt; and&amp;nbsp;Fedora.&lt;/p&gt;
&lt;h3&gt;Linaro&amp;nbsp;again&lt;/h3&gt;
&lt;p&gt;In 2016 &lt;a href="/2016/04/08/back-linaro-org/"&gt;I joined Linaro again&lt;/a&gt;
(this time as Red Hat engineer). To work on Arm servers. For data centers and&amp;nbsp;clouds.&lt;/p&gt;
&lt;p&gt;Virtualization, OpenStack, Big Data, emulation of Arm servers&amp;nbsp;etc.&lt;/p&gt;
&lt;h3&gt;Acknowledgements&lt;/h3&gt;
&lt;p&gt;There were many people who helped me on this&amp;nbsp;journey.&lt;/p&gt;
&lt;p&gt;First of all Anna Wagner-Juszkiewicz &amp;#8212; without her patience and forcing me to
create my own company I would not go that&amp;nbsp;far.&lt;/p&gt;
&lt;p&gt;Then OpenEmbedded team&amp;nbsp;members:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Philip&amp;nbsp;Balister&lt;/li&gt;
&lt;li&gt;Phil&amp;nbsp;Blundell&lt;/li&gt;
&lt;li&gt;Florian&amp;nbsp;Boor&lt;/li&gt;
&lt;li&gt;Holger&amp;nbsp;Freyther&lt;/li&gt;
&lt;li&gt;Koen&amp;nbsp;Kooi&lt;/li&gt;
&lt;li&gt;Christopher&amp;nbsp;Larson&lt;/li&gt;
&lt;li&gt;Mickey&amp;nbsp;Lauer&lt;/li&gt;
&lt;li&gt;Richard&amp;nbsp;Purdie&lt;/li&gt;
&lt;li&gt;Holger&amp;nbsp;Schurig&lt;/li&gt;
&lt;li&gt;and countless&amp;nbsp;contributors&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Some work changes related&amp;nbsp;people:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Cliff Brake (my first freelance &lt;span class="caps"&gt;OE&lt;/span&gt;&amp;nbsp;jobs)&lt;/li&gt;
&lt;li&gt;Tim Bird (&lt;span class="caps"&gt;CELF&lt;/span&gt; was my first&amp;nbsp;customer)&lt;/li&gt;
&lt;li&gt;Matthew Allum (full time contract so I left web&amp;nbsp;development)&lt;/li&gt;
&lt;li&gt;Christian Reis (Canonical/Linaro&amp;nbsp;job)&lt;/li&gt;
&lt;li&gt;Jon Masters (&amp;#8220;come, work at Red Hat with&amp;nbsp;us&amp;#8221;)&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Linaro&amp;nbsp;folks:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Fathi&amp;nbsp;Boudra&lt;/li&gt;
&lt;li&gt;Andrea&amp;nbsp;Gallo&lt;/li&gt;
&lt;li&gt;Gema&amp;nbsp;Gomez&lt;/li&gt;
&lt;li&gt;Lee&amp;nbsp;Jones&lt;/li&gt;
&lt;li&gt;Leif&amp;nbsp;Lindholm&lt;/li&gt;
&lt;li&gt;Sahaj&amp;nbsp;Sarup&lt;/li&gt;
&lt;li&gt;Ebba&amp;nbsp;Simpson&lt;/li&gt;
&lt;li&gt;Riku&amp;nbsp;Voipio&lt;/li&gt;
&lt;li&gt;Linus&amp;nbsp;Walleij&lt;/li&gt;
&lt;li&gt;Wookey&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Of course I am unable to list everyone. During those twenty years I met many
people, some became friends, some became adversaries. There are faces/names I
remember (and more of those I should remember). And there are people who
recognize me when I do not recognize them (sorry&amp;nbsp;folks).&lt;/p&gt;
&lt;h3&gt;Hall of fame&amp;nbsp;shelf&lt;/h3&gt;
&lt;p&gt;There is a plan to frame several devices from my&amp;nbsp;past:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Sharp Zaurus &lt;span class="caps"&gt;SL&lt;/span&gt;-5500 (from which all that&amp;nbsp;started)&lt;/li&gt;
&lt;li&gt;Atmel &lt;span class="caps"&gt;AT91SAM9263EK&lt;/span&gt; (first developer board I&amp;nbsp;owned)&lt;/li&gt;
&lt;li&gt;Applied Micro Mustang (first AArch64&amp;nbsp;server)&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;And who knows, maybe some other hardware but first would need to get it. Some
already got recycled, some had to be&amp;nbsp;destroyed.&lt;/p&gt;
&lt;h3&gt;Plans for next&amp;nbsp;years?&lt;/h3&gt;
&lt;p&gt;I plan to continue working on Arm architecture. It brings me fun&amp;nbsp;still.&lt;/p&gt;
&lt;p&gt;And who knows, maybe one day some standards compliant AArch64 based system will
replace my x86-64 desktop. All those &lt;span class="caps"&gt;UEFI&lt;/span&gt;, &lt;span class="caps"&gt;ACPI&lt;/span&gt;, &lt;span class="caps"&gt;SBSA&lt;/span&gt;, &lt;span class="caps"&gt;SBBR&lt;/span&gt;, SystemReady
buzzwords in working piece of hardware. Just without spending thousands of €€€
for&amp;nbsp;it.&lt;/p&gt;</content><category term="arm"/><category term="aarch64"/><category term="linaro"/><category term="zaurus"/><category term="red hat"/></entry></feed>